---

Bereits vergeben

• 

  Infineon Technologies Austria AG · Job · Inaktiv

  Digital Design Engineer Be responsible for Digital design (System Verilog / VHDL coding), verification and

  Ab 46k Villach Vollzeit m/w/x

  Check your match! Matchen!

  • Verilog
  • VHDL
  • SystemVerilog
  • Perl
  • TCL

• 

  Infineon Technologies Austria AG · Job · Inaktiv

  Senior Digital Design Engineer Digital design and simulation of integrated circuits in automotive systems (RTL coding, implementation of assertions, synthesis, basic verification)

  Graz Vollzeit m/w/x

  Check your match! Matchen!

  • SystemVerilog
  • Verilog
  • VHDL
  • Python
  • Perl
  • Cadence

• 

  Dialog Semiconductor · Job · Inaktiv

  Digital Design Engineer Interpret requirements specification and derive digital system/architecture specification and design strategies for power management products; practice and encourage design re-use (IP) wherever sensible.

  Graz Vollzeit m/w/x

  Check your match! Matchen!

  • SystemVerilog
  • TCL
  • Less
  • Verilog
  • VHDL

• 

  Siemens AG Österreich · Job · Inaktiv

  Embedded Computing HW Experte System/Hardware Architektur und detailliertes Design von innovativen Prototypen

  Ab 48k Wien Vollzeit m/w/x

  Check your match! Matchen!

  • ARM
  • VHDL
  • SystemVerilog
  • SystemC
  • C
  • C++
  • Linux

• 

  Accurision · Job · Inaktiv

  Senior Digital Design Engineer (f/m) At Accurision, you will provide leadership and drive innovations during all phases of digital IC development like definition, requirements mapping, architectural design, RTL, VHDL/Verilog, synthesis, simulations, timing analysis, verification, etc., collaborate closely with other GNSS team members to optimize and extend our solution.

  41k bis 47k Lustenau Vollzeit m/w/x

  Check your match! Matchen!

  • VHDL
  • Verilog
  • SystemVerilog
  • ARM