SystemVerilog Jobs

Verpasste Dev-Jobs

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  Infineon Technologies Austria AG · Job · Inaktiv

  Senior Engineer Digital Design

  Design complex hardware modules with SystemVerilog, VHDL/Verilog

  Graz Vollzeit m/w/x

  Check your match! Matchen!

  • SystemVerilog
  • Verilog
  • VHDL

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  Infineon Technologies Austria AG · Job · Inaktiv

  Principal Engineer Digital

  Translate design requirements to a test & verification plan, maintain the test plan throughout a project

  Graz Vollzeit m/w/x

  Check your match! Matchen!

  • Verilog
  • SystemVerilog
  • C
  • C++
  • Python
  • Perl
  • Linux

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  Dialog Semiconductor · Job · Inaktiv

  Senior Digital Engineer

  Ensuring digital verification process achieves budget, schedule and project deliverable goals

  Graz Vollzeit m/w/x

  Check your match! Matchen!

  • SystemVerilog
  • SystemC

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  Infineon Technologies Austria AG · Job · Inaktiv

  Digital Design Engineer

  Be responsible for Digital design (System Verilog / VHDL coding), verification, simulation, synthesis and static timing analysis

  Ab 47k Villach Vollzeit m/w/x

  Check your match! Matchen!

  • Verilog
  • VHDL
  • SystemVerilog
  • SystemC

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  Infineon Technologies Austria AG · Job · Inaktiv

  Functional Verification Engineer & Digital Designer

  Work with other ASIC designers and architects on design and verification to produce thoroughly verified, robust SoCs, and ensure that subsystems and IPs are properly connected and verified

  Graz Vollzeit m/w/x

  Check your match! Matchen!

  • SystemVerilog
  • C
  • C++
  • Perl
  • Python
  • Verilog
  • VHDL

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  Semify Eda · Job · Inaktiv

  Junior Digital Design Engineer

  During your work as Junior Design and Verification Engineer you will

  Ab 33k Graz Vollzeit m/w/x

  Check your match! Matchen!

  • SystemVerilog
  • Python
  • Jupyter (IPython)
  • NumPy
  • Git

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  Infineon Technologies Austria AG · Job · Inaktiv

  Digital Design Engineer

  Be responsible for Digital design (System Verilog / VHDL coding), verification and

  Ab 46k Villach Vollzeit m/w/x

  Check your match! Matchen!

  • Verilog
  • VHDL
  • SystemVerilog
  • Perl
  • TCL

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  Infineon Technologies Austria AG · Job · Inaktiv

  Senior Digital Design Engineer

  Digital design and simulation of integrated circuits in automotive systems (RTL coding, implementation of assertions, synthesis, basic verification)

  Graz Vollzeit m/w/x

  Check your match! Matchen!

  • SystemVerilog
  • Verilog
  • VHDL
  • Python
  • Perl
  • Cadence

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  Dialog Semiconductor · Job · Inaktiv

  Digital Engineer

  Interpret requirements specification and derive digital system/architecture specification and design strategies for power management products; practice and encourage design re-use (IP) wherever sensible.

  Graz Vollzeit m/w/x

  Check your match! Matchen!

  • SystemVerilog
  • TCL
  • Less
  • Verilog
  • VHDL

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  Siemens AG Österreich · Job · Inaktiv

  Embedded Expert

  System/Hardware Architektur und detailliertes Design von innovativen Prototypen

  Ab 48k Wien Vollzeit m/w/x

  Check your match! Matchen!

  • ARM
  • VHDL
  • SystemVerilog
  • SystemC
  • C
  • C++
  • Linux

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  Accurision · Job · Inaktiv

  Senior Digital Design Engineer

  At Accurision, you will provide leadership and drive innovations during all phases of digital IC development like definition, requirements mapping, architectural design, RTL, VHDL/Verilog, synthesis, simulations, timing analysis, verification, etc., collaborate closely with other GNSS team members to optimize and extend our solution.

  41k bis 47k Lustenau Vollzeit m/w/x

  Check your match! Matchen!

  • VHDL
  • Verilog
  • SystemVerilog
  • ARM