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  Apple Inc · Job

  Digital-Mixed-Signal Verification Engineer Developing analog behavioural models in System Verilog Running model versus schematic correlation simulations to guarantee the matching to the schematic specifications

  Linz Vollzeit m/w/x

  Check your match! Matchen!

  • Cadence
  • Verilog
  • VHDL
  • C
  • C++

• 

  NXP Semiconductors Austria · Job

  Security Engineer Specification of innovative and disruptive security solutions

  Gratkorn Vollzeit m/w/x

  Check your match! Matchen!

  • Cadence
  • Verilog
  • VHDL

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  ams AG · Job

  Principal Digital Design Engineer As a Principal Digital Design Engineer in the ISS BU, you will be participating in leading edge innovative product development for our Consumer & Automotive product lines.

  Premstätten Vollzeit m/w/x

  Check your match! Matchen!

  • Verilog
  • MATLAB
  • SystemC
  • C
  • ARM
  • VHDL
  • Jama

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  Infineon Technologies Austria AG · Job

  Analog/Mixed Signal Design Engineer Design and verification of analog and mixed signal circuits, in particular CMOS signal processing circuits (e.g.: amplifiers, ADCs, DACs, oscillators, PLLs, voltage regulators, filters, ESD/EMC suppression etc.)

  Ab 48k Graz Vollzeit m/w/x

  Check your match! Matchen!

  • Verilog
  • VHDL
  • C
  • MATLAB
  • Simulink

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  NXP Semiconductors Austria · Job

  Digital Design Engineer Supports concept making and development of digital modules for NXP Automotive products.

  Gratkorn Vollzeit m/w/x

  Check your match! Matchen!

  • VHDL
  • Verilog
  • TCL
  • Python
  • Bash
  • C
  • MATLAB

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Verpasste Dev-Jobs

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  Microchip · Job · Inaktiv

  Senior Embedded Solution Engineer FPGA Be an authority in FPGAs including SOC FPGAs, able to both advise on and implement innovative ideas and solutions to Microchip's clients.

  Wels Vollzeit m/w/x

  Check your match! Matchen!

  • FPGA
  • VHDL
  • Verilog
  • C
  • C++
  • ARM

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  Infineon Technologies Austria AG · Job · Inaktiv

  Test/QA Engineer As our new Mixed Signal Test Engineer (f/m/div)* you work in a highly professional team being responsible for the definition of test concepts and test cases in close cooperation with concept engineers, design engineers and lab verification engineers. This position is just tailor made for someone who knows how to work smart and is keen-minded.

  Ab 46k Villach Vollzeit m/w/x

  Check your match! Matchen!

  • Less
  • C
  • C++
  • Visual Basic for Applications
  • VHDL
  • Verilog

• 

  Infineon Technologies Austria AG · Job · Inaktiv

  Digital Design Engineer Be responsible for Digital design (System Verilog / VHDL coding), verification, simulation, synthesis and static timing analysis

  Ab 47k Villach Vollzeit m/w/x

  Check your match! Matchen!

  • Verilog
  • VHDL
  • SystemVerilog
  • SystemC

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  Infineon Technologies Austria AG · Job · Inaktiv

  Design Application Engineer Support R&D application and concept engineers for daily issues related to mixed-signal embedded system development and related software tools and methodology (1st level support)

  Ab 58k Villach Vollzeit m/w/x

  Check your match! Matchen!

  • Python
  • SystemC
  • C++
  • Verilog
  • Visual Studio
  • MATLAB
  • Simulink

• 

  Dialog Semiconductor · Job · Inaktiv

  Principal Digital Design Engineer Designing of optimized digital blocks meeting functional, cost and low power constraints and ensuring spec compliance.

  Graz Vollzeit m/w/x

  Check your match! Matchen!

  • TCL
  • Verilog
  • VHDL

• 

  Infineon Technologies Austria AG · Job · Inaktiv

  Mixed Signal Test Engineer Leverage DfT (Design-for-Test) and BIST (Built-in Self-Test) concepts to maximize test coverage and minimize test cost

  Ab 46k Villach Vollzeit m/w/x

  Check your match! Matchen!

  • Less
  • C
  • C++
  • Visual Basic for Applications
  • VHDL
  • Verilog

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  Infineon Technologies Austria AG · Job · Inaktiv

  Functional Verification Engineer & Digital Designer Work with other ASIC designers and architects on design and verification to produce thoroughly verified, robust SoCs, and ensure that subsystems and IPs are properly connected and verified

  Graz Vollzeit m/w/x

  Check your match! Matchen!

  • SystemVerilog
  • C
  • C++
  • Perl
  • Python
  • Verilog
  • VHDL

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  ams AG · Job · Inaktiv

  Firmware Engineer You are responsible for the design, development and unit testing of software/firmware in embedded systems including interfaces for communicating with hardware

  Graz Vollzeit m/w/x

  Check your match! Matchen!

  • ARM
  • C
  • C++
  • Perl
  • Python
  • Git
  • subversion

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  ams AG · Job · Inaktiv

  Senior Software Engineer Responsible for the design, development and unit testing of software/firmware in embedded systems including interfaces for communicating with hardware

  Premstätten Vollzeit m/w/x

  Check your match! Matchen!

  • ARM
  • C
  • Perl
  • Python
  • Git
  • subversion
  • Verilog

• 

  Infineon Technologies Austria AG · Job · Inaktiv

  Embedded System Development Support R&D application and concept engineers for daily issues related to mixed-signal embedded system development and related software tools and methodology (1st level support)

  Villach Vollzeit m/w/x

  Check your match! Matchen!

  • FPGA
  • Python
  • SystemC
  • C++
  • Verilog
  • Visual Studio
  • MATLAB