Digital Verification Engineer

Neu

IMS Nanofabrication GmbH

Job

In dieser Position entwickelst du Verifizierungsstrategien und Testumgebungen, um Designfehler zu identifizieren und durch effektive Debugging-Techniken die Qualität digitaler Designs sicherzustellen.

Job-Zusammenfassung

Job-Technologien

Deine Rolle im Team

  • In this position you will own the verification strategy, testbench development, and sign-off readiness for assigned IPs, subsystems, or distributed systems.
  • You will work closely with Digital Design Engineers and System Architects to identify design defects, close coverage gaps, and drive the adoption of best practices, automation, and scalable verification methodologies across projects.
  • Own the verification planning process for assigned IPs and subsystems, including definition of verification scope, strategy, coverage goals, and resource requirements.
  • Develop and maintain reusable verification environments, testbenches, verification components, and infrastructure using industry-standard methodologies and languages.
  • Ensure complete verification of functional requirements through directed, constrained-random, assertion-based, and coverage-driven verification.
  • Execute verification closure activities by tracking functional, code, assertion, and other relevant coverage metrics against defined project targets.
  • Identify, analyze, and drive resolution of design defects through systematic debug and root-cause analysis in collaboration with design engineering teams.
  • Develop and integrate assertions, checkers, scoreboards, and protocol monitors to improve verification effectiveness and defect detection.
  • Own regression management, including automation, execution monitoring, failure analysis, and reporting of verification status.
  • Collaborate with system architects and design engineers to review specifications and ensure verifiable and testable design requirements.
  • Support verification sign-off reviews by providing objective evidence of verification completeness, risk assessment, and residual defect analysis.
  • Drive continuous improvement of verification productivity through automation, scripting, tool optimization, and reusable verification assets.
  • Contribute to the evaluation, qualification, and deployment of new verification methodologies, tools, and technologies.
  • Ensure verification deliverables meet project milestones while proactively identifying schedule, quality, and technical risks.
  • Mentor junior verification engineers and provide technical guidance on verification planning, execution, debugging, and best practices.

Unsere Erwartungen an dich

Ausbildung

  • Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or a related technical discipline.

Qualifikationen

  • Strong expertise in SystemVerilog and UVM-based verification methodologies.
  • Strong understanding of digital design fundamentals, RTL development concepts, and semiconductor development processes.
  • Demonstrated expertise in functional and code coverage analysis and sign-off methodologies.
  • Proficiency in scripting languages such as Python or Tcl, with familiarity in version control systems and regression management.
  • Strong analytical and problem-solving skills with a systematic, detail-oriented approach.
  • Excellent communication and collaboration skills with the ability to work effectively in global, cross-functional environments.
  • Self-reliant work style with the ability to take ownership of complex verification tasks end-to-end and proactively identify risks.

Erfahrung

  • 5+ years of experience in digital IC verification within the semiconductor industry.
  • Proven experience developing constrained-random, assertion-based (SVA), and coverage-driven verification environments.
  • Hands-on experience with industry-standard simulators, debuggers, and waveform analysis tools.
  • Experience debugging complex digital designs and collaborating with cross-functional engineering teams.
  • Experience with SoC-level verification and complex subsystem integration projects.

Unser Angebot

  • Exciting opportunities to grow professionally and personally - in an international environment.
  • Dynamic, collegial and open to new ideas - together we are writing the future.
  • Flexible working hours, the option to work occasionally from home.
  • Very good public transport connections and discounted parking with direct access from the office to the garage.
  • Company doctor and psychologist - support for your health.
  • All employees benefit from our success - together we achieve more.
  • Environmentally friendly commuting and staying fit - with us you can lease your bike at a reasonable price.
  • Summer party, cool team events - we celebrate our successes together.
  • From car washes to wellness days - benefit from many discounts.
  • With us you will receive an attractive annual gross salary from 70.000 € (plus bonus, KV Metallgewerbe). Depending on your experience, this can also be higher.

Benefits

Themen, mit denen du dich im Job beschäftigst

Job-Standorte

Karte der Job-Standorte
© OpenMapTiles, © OpenStreetMap contributors
  • Standort Wien
    Schreygasse 3, 1020 Wien, Österreich

Das ist dein Arbeitgeber

IMS Nanofabrication GmbH

Brunn Am Gebirge, Wien

Die IMS Nanofabrication AG ist ein renommiertes, österreichisches Hightech-Unternehmen, das sich auf Innovationen in den Bereichen Lithographie und Nanotechnologie spezialisiert hat. Gemeinsam mit weltweit führenden Unternehmen im Halbleiterbereich haben wir eine entscheidende Technologie entwickelt, die für die Herstellung von zukunftsweisenden Halbleiterchips unbedingt notwendig ist.

Unternehmenstyp
Etablierte Firma
Arbeitsmodell
Full Remote, Hybrid, Onsite
Branche
Industrie, Produktion

Arbeitgeber-Reviews

2,3Gesamt(2 Bewertungen)
Karriere
x
2,0
Arbeitsbedingungen
x
2,9
Teamkultur
x
2,6
Engineering
x
1,9
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Digital Verification Engineer

IMS Nanofabrication GmbH