Job
- Level
- Erfahren
- Job Feld
- Embedded
- Anstellung
- Vollzeit
- Vertragsart
- Unbefristetes Dienstverhältnis
- Gehalt
- ab 66.676 € Brutto/Jahr
- Ort
- Linz
- Arbeitsmodell
- Onsite
Job Zusammenfassung
In dieser Funktion entwickelst du Prüfstrategien für Cellular RF SoCs, entwirfst UVM-basierte Testbenches und führst Verifikationstests durch, um die Qualität und Funktionalität der Designs sicherzustellen.
Job Technologien
Deine Rolle im Team
- Enter a multifunctional role as a Design Verification Engineer in our team in Linz, Austria.
- We are at the center of the IP and full-chip verification effort within a silicon design group responsible for verifying the state-of-the-art Cellular RF SoCs.
- This position requires someone comfortable with diving into HW design and verification engineering.
- You will need a fundamental understanding of HW and SW design, as well as the eagerness to do hands-on verification.
- The cool thing is, once you crack the design verification world, it will potentiate your knowledge of HW/SW systems in the RF world.
- We will introduce you to assertion-based verification, simulation acceleration, and formal methods.
- You will learn special verification languages as universal verification methodology (UVM) or formal description languages, like SVA, flanked by AI-based approaches.
- Our team is a very strong cellular hardware design verification team with very good individual communication.
- You will work in a strong team setup with a lot of interpersonal interaction that will help you to get a very wide understanding of our work, as well as the sub-system and system integration into RF modems.
- You will build metric-driven verification plans from specifications, review them, and refine them to achieve coverage targets.
- You will define functional verification requirements based on design requirements and architect and develop UVM-based, highly reusable test benches starting from different components over a cluster into SoC levels.
Unsere Erwartungen an dich
Ausbildung
- Bachelor's or Master's (or higher degree) in Electrical Engineering or Communication Engineering with extensive years of working experience.
Qualifikationen
- Verification and Validation approach, as well as outstanding sense and dedication to the quality of deliverables.
- A detective skill for finding bugs and weaknesses.
- Having a good view of the definition and design process of a chip.
- Holistically thinking beyond the design verification domain boundaries.
- Good interpersonal and communication skills.
- English language proficiency is required for this position.
- System know-how in the cellular RF transceiver domain is a plus.
- Proficiency in RISC-V architecture, encompassing design, verification, and programming, is highly valued.
- Knowledge of assertion-based verification would be nice to have.
- Ideally, you worked on system/IP definition, system/IP validation, system/IP design, system/IP testing, or similar.
Erfahrung
- Proven experience in taping out SoC systems with embedded processor cores and hands-on verification experience in UVM environments.
- Strong collaborative work experience with system, design, and firmware teams.
Job Standorte
Themen mit denen du dich im Job beschäftigst
Das ist dein Arbeitgeber
Apple Inc
Apple ist eines der umsatzstärksten Unternehmen in den Bereichen Computer, mobile Geräte, Unterhaltungselektronik, Anwendersoftware sowie Betriebssysteme. Zudem betreibt Apple ein Internet-Vertriebsportal für Musik, Filme und Software.
Description
- Sprachen
- Englisch
- Unternehmenstyp
- Etablierte Firma
- Arbeitsmodell
- Onsite
- Branche
- Elektronik, Automatisation, Internet, IT, Telekom
Design Verification Engineer
- Gehalt
- ab 66.676 € Brutto/Jahr
- Ort
- Linz
- Arbeitsmodell
- Onsite
